In recent years, wiring patterns have been miniaturized to, for example, 65 nm to 45 nm, on the basis of the miniaturization rule, in order to increase the storage density of semiconductor chips. Along with this miniaturization, the number of external connection terminals of semiconductor chips has increased, and the need for external connection terminals to be modified for a smaller pitch has become urgent. Meanwhile, external connection terminals have been formed in an area bump system, where the entire surface of the semiconductor chip on which the circuit is formed is used, in order to prevent the pitch of the external connection terminals from becoming too small, instead of in a conventional peripheral bump system. In addition, as the speed of operation of semiconductor chips increases, a porous, low dielectric material, for example, has started to be used as an insulating layer material used as a semiconductor element. Furthermore, the thickness of semiconductor chips has been reduced together with the reduction in the scale of electronic apparatus or the like inside which semiconductors chips are mounted.
However, thin semiconductor chips having a low dielectric material are generally fragile, and become cracked or damaged due to the load at the time of mounting. Furthermore, the crystal lattice in semiconductor chips becomes distorted due to heat and the like, so that the transistor properties and the like tend to fluctuate in a case of use in such a state that there remains stress at the time of mounting.
Therefore, bumps (protruding electrodes) that can be formed under a low mounting load are strongly in demand for external connection electrodes formed on semiconductor chips having a low mechanical strength with a fine pitch.
In order to solve these problems, forming of protruding electrodes in cone form or pyramid form and protruding electrodes using a conductive resin has been examined. For example, semiconductor devices where pointed conductive resin bumps, for example, are formed on semiconductor chips, and the semiconductor chips are mounted using these conductive resin bumps have been disclosed (see for example Patent Document 1). In addition, the conductive resin bumps in Patent Document 1 are formed using the following method. That is to say, the method includes the step of forming pointed holes on the main surface of a plate in such a manner that they correspond to electrode pads formed on a semiconductor chip, the step of filling these holes with a conductive resin, the step of positioning the plate so that the main surface of the plate and the surface of the semiconductor chip for holding electrode pads face each other and positioning the plate so that the holes and corresponding electrode pads on the semiconductor chip face each other; the step of overlapping the plate with the semiconductor chip, and the step of forming pointed conductive resin bumps on the electrode pads with making the conductive resin cured.
Here, in the step of forming holes, a single crystal silicon (Si) substrate having a (100) surface as the main surface is used as the plate, and a method for forming holes on the (100) surface in accordance with a wet etching method is shown. As a result, protruding electrodes having a height of, for example, 60 μm, and a dispersion of within 2.5 μm in accordance with standard deviation can be formed without forming a barrier metal on the external connection terminals of the semiconductor element. In addition, an inexpensive semiconductor device where reliable contact is possible can be obtained.
In addition, protruding electrodes in the area bump system which makes highly reliable connection possible and can absorb warps in a substrate (see for example Patent Document 2) have also been disclosed. The protruding electrodes in Patent document 2 have a two-stage form where smaller upper stage bumps are formed on top of lower stage bumps, and the modulus of elasticity of the upper bumps is smaller than the modulus of elasticity of the lower bumps in the configuration. As a result, the stress between the semiconductor element and the substrate can be sufficiently absorbed by the protruding electrodes themselves. In addition, in a case where a conductive adhesive is used, the protruding electrodes and the conductive adhesive can absorb more stress. As a result, in the semiconductor device using the above protruding electrodes, the reliability of the connection can be increased. Furthermore, even in a case where there is a warp in the substrate in the area bump system, the warp can be effectively absorbed. In addition, Patent Document 2 also shows that the upper bumps are formed of a photosensitive conductive resin and a metal film is formed on the surface of the formed bumps.
Meanwhile, methods for fabricating substrates on which semiconductor elements are mounted in a simple process have been examined. As one method, the method of forming an electrically insulating layer and a wiring layer in accordance with stereo lithography (see for example Patent Document 3) has been disclosed. In addition, the manufacturing method for a wiring board in Patent Document 3 is shown in the following. That is to say, the manufacturing method includes the step of forming an electrically insulating layer in accordance with stereo lithography using an insulating liquid resin, and the step of forming a wiring pattern in the wiring layer by photo-curing portions which form the wiring pattern in accordance with stereo lithography using a conductive liquid resin and removing the conductive liquid resin from portions other than the photo-cured portions.
In addition, a method for forming a three-dimensional structure using a liquid crystal mask through the above stereo lithography (see for example Patent Document 4) has also been disclosed.
According to the above Patent Document 1, holes formed on a single crystal silicon substrate are filled with a conductive resin, and protruding electrodes are formed on electrode terminals of semiconductor elements through transfer method, and therefore, protruding electrodes in pyramid form having little inconsistency in the height (thickness) can be obtained. In accordance with this method, however, though the inconsistency in the height of the protruding electrodes can be controlled, the height of the surface or the like of the protruding electrodes formed on the semiconductor element does not become constant in a case where there is a warp in the semiconductor element or the surface of the semiconductor element on which the protruding electrodes are formed is uneven. That is to say, the inconsistency in height between the rear surface of the semiconductor element and the peaks of the protruding electrodes cannot be reduced, and as a result, there is a problem, such that defects in mounting cannot be reduced.
In addition, in the protruding electrodes having a two-stage structure of Patent Document 2, the modulus of elasticity of the upper stage bumps is smaller than the modulus of elasticity of the lower stage bumps, and therefore, the inconsistency in the height of the bumps and the pressing force can be absorbed at the time of mounting. As the same as that in the above Patent Document 1, however, the height of the surface of the protruding electrodes formed on the surface of the semiconductor element does not become constant, and therefore, the inconsistency in the height between the rear surface of the semiconductor element and the peaks of the protruding electrodes cannot be reduced, and thus, there is the same problem as in Patent Document 1.    [Patent Document 1] Unexamined Japanese Patent Publication No. H10 (1998)-112474    [Patent Document 2] Unexamined Japanese Patent Publication No. 2001-189337    [Patent Document 3] Unexamined Japanese Patent Publication No. 2004-22623    [Patent Document 4] Unexamined Japanese Patent Publication No. 2001-252986